The present invention relates to a semiconductor structure having a photosensitive zone and transfer gate and an area for temporarily storing (latching, or buffering) photogenerated charges in a potential well upon transfer across the transfer gate, as well as to a method of operating such a semiconductor structure, and to a production method.
Electrooptical image sensors have globally taken up a considerable market share. They enrich people's lives in many aspects. Markets where such sensors are applied are, for example, photography, medical technology, the automotive industry, scientific sensor systems, broadcasting, safety/security/machine vision or the consumer market.
Generally, CMOS image sensors have a dominant market share as compared to CCD sensors. This is essentially due to applications in the consumer market, where low-cost CMOS image sensors are used, among other things, for handhelds, notebooks or mobile radio devices. Those CMOS sensors which serve this market often benefit from the high integration density. The latter may be achieved in CMOS both for signal-pickup detectors and for the evaluating electronics. An additional advantage over CCD sensors is that the detectors (pixels) and the electronics, which may be very complex if need be, can be implemented on a semiconductor chip, which results in low-cost camera systems.
The market for image sensors for industrial or scientific applications with CCD sensors is more pronounced in relation to the consumer market. It is said that said market often has a lower intrinsic uncertainty and/or lower inherent noise and, thus, a larger dynamic range as compared to CMOS sensors. It is therefore mandatory for competitive CMOS products to produce sensors having as large dynamic ranges as possible while not using any or using as few expensive process variations as possible.
In addition, sensors for such applications are often not subject the harsh restrictions regarding increasing miniaturization, which in most cases are tied to enormous investments in process technology. This includes, e.g., sensors for spectroscopy, distance measurement or X-ray detection, which in many cases involve large photoactive areas so that signals can be detected even at low irradiance. Low-noise CMOS sensors, which may be produced without any expensive process modifications, in combination with the flexibility offered by CMOS as compared to CCD thus have a large market potential.
Applications for the proposed low-noise semiconductor structure for converting photogenerated charge are, for example:                inspection/positioning systems        automotive imaging systems:                    surveillance inside a vehicle            airbag controlling systems            vehicle safety            road-line recognition            pre-crash sensors            pedestrian protection            self-parking systems                        topographical applications        general surveillance systems        medical imaging        scientific imaging applications        video games and entertainment        
Noise reduction of sensors based on CMOS imagers is an essential problem that needs solving in order to provide products that can compete with CCD technology. The dominant readout structure for CCD imagers and CMOS imagers based on pinned photodiodes or the like is “floating diffusion” (FD). The readout principle based on an FD is restricted, in terms of noise performance, by the so-called reset noise. Said reset noise describes the inaccuracy of the reset level which is achieved when the storage capacity is being charged. On the basis of the so-called Correlated Double Sampling Method (CDS), it has been possible to improve the signal-to-noise ratio of such sensors substantially. In this context, two sampling operations are performed in as timely a manner as possible; at one point, only the reset value is sampled, and at another point, the subsequently detected signal level is sampled. Upon subsequent subtraction of these values, the inaccuracy is ideally eliminated since in the event of an obvious correlation, it is similarly inherent to the reset value as it is to the signal value (Solid-State Imaging with Charge-Coupled Devices, A. J. Theuwissen, ISBN-10: 9048145430, 2010). Analyses show that upon elimination of the reset noise, the uncertainty of the readout is often dominated by the source follower, which is mostly used as a readout circuit (Characterization and improvement of random noise in 1/3.2″ UXGA CMOS image sensor with 2.8 μm pixel using 0.13 μm-technology, J. Y. Kom et al., Proc. IEEE Workshop on Charge-Coupled Devices and Advanced Image Sensors, 2005). The uncertainty of this source follower is often described, by way of example, by thermal noise, excess noise and random telegraph signal (RTS) noise, the two latter processes typically being dominant. Since CDS stages exhibit a filter characteristic, the noise sources of the source follower may partly be reduced by suitably dimensioning said filter characteristic. RTS noise, however, cannot be fully eliminated by a CDS stage and might possibly result, in the case of unsuitable dimensioning of the source follower, not only in increased uncertainty in the readout of a pixel, but, also caused by the process variations to which the sensors are subject, also in local distribution of the uncertainty across the pixel matrix of such CMOS imagers (Random Telegraph Signal in CMOS Image Sensor Pixels, X. Wang et al., IEDM Tech. Dig., 2006).
There have been various efforts to decimate excess noise and RTS noise of the source follower. By way of example, one often associates said noise processes in CMOS devices with defects (traps) in the substrate or at interfaces such as the silicon/silica interface. Said traps may locally bind and release charge carriers, which causes RTS noise. If the area where the charge carrier transport takes place is flawed with “many” traps, excess noise will arise according to the idea of the McWorther model (1/f noise and related surface effects in germanium, A. L. McWorther, Thesis (Sc. D.) MIT, 1955). At the circuit level, RTS noise has been reduced, e.g., by clocking the operating current of the source follower. The model concept here is based on the assumption that shortly after switching on the operating current, no charge carriers are captured by traps, and that this will remain so for a period of time (Novel Readout Circuit Architecture for CMOS Image Sensors Minimizing RTS Noise, P. Martin-Gonthier et al., IEEE Electron Device Letters, 2011). However, this innovation does not eliminate the traps themselves, but only reduces their effect for an uncertain time period.
The geometry variation of the source follower transistor was examined in detail and published (Optimization of Random Telegraph Noise Non Uniformity in a CMOS Pixel with a pinned-photodiode, A. Lahav et al., Proc. Int. Image Sens. Workshop 2007; RTS Noise Impact in CMOS Image Sensors Readout Circuit, P. Martin-Gonthier et al., 16th IEEE International Conference on Electronics, Circuits, and Systems, 2009). Alternatively, one has been able to show that RTS and excess noise can be minimized even by relatively simple layout measures in that the current-carrying area of the transistor no longer contacts the field oxide, which is often relatively poor in quality for production-related reasons (Custom transistor layout design techniques for random telegraph signal noise reduction in CMOS image sensors, P. Martin-Gonthier et al., Electronic Letters, 2010). The gain in noise performance thus published is to be evaluated as positive if one takes into account that no process modifications need to be performed to achieve it. However, by contrast, a substantial improvement in the noise performance was achieved by not adapting the geometry or the layout of standard structures, but by using an additional implantation (A CMOS Image Sensor with a Buried-Channel Source Follower, X. Wang et al., ISSCC 2008; A CMOS Image Sensor With In-Pixel Buried-Channel Source Follower and Optimized Row Selector, Y. Chen et al., IEEE Transactions on Electron Devices, 2009). This additional implantation is used for defining the current-carrying channel of the source follower underneath the silicon/silica interface. Even though the idea of buried MOS dates back at least to the year 1976 (Conductance of Ion-Implanted Buried-Channel MOS Transistors, W. Schemmert et al., Transactions on Electron Devices, 1976), the innovation achieved is enormous since the noise performance has been enormously improved at manageable technological expense and without any or with possibly only a small loss regarding the filling factor of a pixel.
The following publications also described techniques addressing low-noise pixel readout: “A Low Noise CCD Output Amplifier” & “The Low Light Level Potential of a CCD Imaging Array”, R. J. Brewer, International Electron Devices Meeting 1978; U.S. Pat. No. 4,074,302; U.S. Pat. No. 5,357,128; “The Double-Sided Floating-Surface Detector: An Enhanced Charge-Detection Architecture for CCD Image Sensors”, E. Roks et al., ESSDERC 1995; “The Double-Sided Floating-Surface Detector: An Enhanced Charge-Detection Architecture for CCD Image Sensors”, E. Roks et al., IEEE Transactions on Electron Devices 1996; Paper “A Bipolar Floating Base Detector (FBD) For CCD Image Sensors”, E. Roks et al., IEDM '92; U.S. Pat. Nos. 5,464,997 & 5,593,910; U.S. Pat. No. 5,229,630; “A High Sensitivity Output Amplifier for CCD Image Sensor”, Y. Matsunaga et al., International Electron Devices Meeting 1987; Paper “A New high Sensitivity Photo-transistor for Area Image Sensors”, H. Yamashita et al., IEDM '88; U.S. Pat. No. 4,984,045; U.S. Pat. No. 5,060,070; and U.S. Pat. No. 5,712,498.